As semiconductor chip die size and complexity increases, the yield ratio, or number of usable die per wafer, tends to decrease. One reason for a decreased yield ratio is the accumulation of defects during fabrication. Not all defects will cause a particular die to become unusable, but defects within a memory circuit, for example, usually result in an unusable die since the memory may not faithfully reproduce the stored data. Typically, the only solution is to discard the defective die, which has a negative impact on the yield ratio.
Commonly, a memory structure may be located on a die and included as an instruction lookup, a temporary storage space, a data translation table, or some other data source for use on the die. Defects within a memory structure can cause the entire die to become unusable. Further, after the die is packaged into a chip carrier, a portion of a memory circuit may fail at a later time, manifesting a similar problem. In this case, the cost of packaging and testing will also be lost if the packaged die is later discarded due to a subsequent failure or previously undiscovered defects.
Accordingly, there is a need in the art for an apparatus and method to increase die usability and die yield for a die or packaged device including a memory device with a defect or failure manifested as a difference between an expected read value versus an actual read value from the memory device.